| PART |
Description |
Maker |
| HD74LS73A 74LS73 74LS73A HD74LS73ARP |
Dual J-K Flip-Flops(with Clear)
FLIP-FLOP|DUAL|J/K TYPE|LS-TTL|SOP|14PIN|PLASTIC 触发器|双|焦 K型|编号LS - TTL电|专科| 14PIN |塑料
Dual J-K Flip-Flops(双J-K触发 JK触发器（JK触发器）
|
HITACHI[Hitachi Semiconductor]
Microchip Technology, Inc.
Hitachi,Ltd.
|
| HD74HC108 HD74HC108P |
Dual J-K Flip-Flops (with Preset/ Common Clear and Common Clock)
Dual J-K Flip-Flops (with Preset, Common Clear and Common Clock)
FLIP-FLOP|DUAL|J/K TYPE|HC-CMOS|DIP|14PIN|PLASTIC
|
HITACHI[Hitachi Semiconductor]
|
| 74LVX112SJ 74LVX112 74LVX112M 74LVX112MTC 74LVX112 |
LV/LV-A/LVX/H SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16
Low Voltage Dual J-K Flip-Flops with Preset and Clear
|
FAIRCHILD SEMICONDUCTOR CORP
FAIRCHILD[Fairchild Semiconductor]
|
| HCTS109HMSR HCTS109KMSR HCTS109K HCTS109D HCTS109D |
Dual Positive-Edge-Triggered D-Type- Flip-Flops With Clear And Preset 14-CDIP -55 to 125 辐射加固双JK触发器拖
Radiation Hardened Dual JK Flip Flop
From old datasheet system
|
Intersil, Corp.
INTERSIL[Intersil Corporation]
|
| AAT3562IGY-320-T1 AAT3562IGY-420-T1 AAT3564IGY-420 |
Triple 3-input positive-AND gates 14-PDIP 0 to 70
CONNECTOR ACCESSORY
Triple 3-input positive-AND gates 14-SOIC 0 to 70
Triple 3-input positive-NAND gates 14-SOIC 0 to 70
Triple 3-input positive-NAND gates 14-PDIP 0 to 70
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear and Preset 16-SOIC 0 to 70
Triple 3-input positive-NAND gates 14-SO 0 to 70
Triple 3-input positive-AND gates 14-SO 0 to 70
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear and Preset 16-PDIP 0 to 70
Dual J-K Flip-Flops With Clear 14-SO 0 to 70
NanoPower Voltage Detector NanoPower电压检测器
Dual J-K Flip-Flops With Clear 14-SOIC 0 to 70 NanoPower电压检测器
Dual J-K Flip-Flops With Clear 14-PDIP 0 to 70 NanoPower电压检测器
|
Advanced Analogic Technologies, Inc.
|
| HD74HC107 HD74HC107P HD74HC107RPEL HD74HC107FPEL |
Dual J-K Flip-Flops (with Clear)
|
Renesas Electronics Corporation
|
| HD74ALVCH16820 |
3.3-V 10-bit Flip Flops with Dual Outputs
|
HITACHI[Hitachi Semiconductor]
|
| HD74LVC74 |
Dual D-type Flip-Flops with Preset and Clear
|
Hitachi Semiconductor
|
| HD74LV74A LV74 |
Dual D-type Flip Flops with Preset and Clear
|
Hitachi,Ltd.
Hitachi Semiconductor
|
| U74LVC74AG-S14-R |
DUAL POSITIVE-EDGETRIGGERED D-TYPE FLIP-FLOPS
|
Unisonic Technologies
|
| M27W201-80K6TR M27W201-200NZ6TR M27W201-80NZ6TR M2 |
2 MBIT (256KB X8) LOW VOLTAGE OTP EPROM
Test Spring Probe; Current Rating:3A; Leaded Process Compatible:Yes; Length:0.060"; Peak Reflow Compatible (260 C):No; Tip/Nozzle Style:90 Concave RoHS Compliant: Yes 2兆位56Kb × 8低压紫外线可擦写可编程只读存储器和OTP存储
Triple 3-Input Positive-AND Gates 14-SO 0 to 70
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear And Preset 16-SO 0 to 70
Triple 3-Input Positive-AND Gates 14-PDIP 0 to 70
Triple 3-Input Positive-AND Gates 14-SOIC 0 to 70
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear And Preset 16-SOIC 0 to 70
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear And Preset 16-PDIP 0 to 70
2 Mbit 256Kb x 8 Low Voltage UV EPROM and OTP EPROM
2 MBIT (256KB X8) LOW VOLTAGE OTP EPROM
|
STMicroelectronics N.V.
意法半导
STMICROELECTRONICS[STMicroelectronics]
ST Microelectronics
|
| DM7474 |
Dual Positive-Edge-Triggered D-Type Flip-Flops
|
Fairchild
|
